Mbed online development system (wiki)
Freescale product summary
Cortex-M0+ (wiki)
MKL25Z128VLK4 datasheet (PDF)
Cortex-M0+ r0p0 Technical Reference Manual; ARM Holdings (PDF)
The processor is a Freescale MKL25Z128VLK4, which is a
implementation of a Cortex-M0+ core, which a low-power CPU using the
ARMv6-M Thumb instruction set.core.
Features:
- "Freescale Kinetis L"
- 32 bit bus
- 48 MHz max clock frequency
- 128 KB program flash memory
- 16 KB RAM
- ADC
- 1.71 V to 3.6 V Supply Voltage
- -40 C - 105 C Working temperature range
- LQFP-80 pinout/casing
- SMD/SMT
- Clock: 32-40kHz (intern?) or 3-32MHz Xtal
- 4 DMA channels, from up to 63 sources
- Software watchdog
- Low-leakage wakeup unit
- SWD (Serial Wire Debug)
- MTD (Micro Trace buffer), a simple instruction trace
- BME (Bit Manipulation Engine)
- 80-bit unique identification (ID) number
- TSI (low-power hardware touch sensor interface)
- GPIO
- 16-bit SAR ADC (Successive Aproximation ADC)
- 12-bit DAC
- Analog comparator using 6-bit ADC and programmable reference voltage
- Six channel Timer/PWM (TPM)
- Two 2-channel Timer/PWM (TPM)
- Periodic interrupt timers
- 16-bit low-power timer (LPTMR)
- Real-time clock
- USB full-/low-speed On-the-Go controller with on-chip transceiver and 5V to 3.3V regulator
- Two 8-bit SPI modules
- Two I2C modules
- One low power UART module
- Two UART modules
Pinout:
- 1-6 - PTE0-PTE5
- 7 - Vdd
- 8 - Vss
- 9 - USB0_DP
- 10 - USB0_DM
- 11 - VOUT33
- 12 - VREGIN
- 13-16 - PTE20-PTE23
- 17 - VddA
- 18 - VrefH
- 19 - VrefL
- 20 - VssA
- 21-25 - PTE29-PTE31,PTE24-PTE25
- 26-37 - PTA0-PTA5,PTA12-PTA17
- 38 - Vdd
- 39 - Vss
- 40-41 - PTA18-PTA19
- 42 - RESET_b
- 43-54 - PTB0-PTB3,PTB8-PTB11,PTB16-PTB19
- 55-58 - PTC0-PTC3
- 59 - Vdd
- 60 - Vss
- 61-72 - PTC4-PTC13,PTC16-PTC17
- 73-80 - PTD0-PTD7
pinout PDF
2.jpg
3.jpg
4.jpg
5.jpg
11.jpg